From 6344325860587c6a0586322cbc7ecb9cc9697a95 Mon Sep 17 00:00:00 2001
From: Astatin <git@astatin.live>
Date: Thu, 14 Nov 2024 22:41:12 +0900
Subject: Add debug instruction

---
 src/opcodes.rs | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

(limited to 'src/opcodes.rs')

diff --git a/src/opcodes.rs b/src/opcodes.rs
index 2502782..b937386 100644
--- a/src/opcodes.rs
+++ b/src/opcodes.rs
@@ -746,7 +746,11 @@ impl GBState {
             0b011 => match n1 {
                 0b000 => self.jp16(),
                 0b001 => self.op_bitwise(), // Bitwise operations
-                0b010 | 0b011 | 0b100 | 0b101 => unimplemented!(),
+                0b011 | 0b100 | 0b101 => unimplemented!(),
+                0b010 => {
+                    self.cpu.print_debug();
+                    Ok(4)
+                },
                 0b110 => {
                     self.mem.ime = false;
                     Ok(4)
-- 
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